The present invention relates generally to phase locked loop circuits, and more particularly to a phase locked loop circuit having a control circuit for operating the phase locked loop with a substantially broadened lock range.
In general, a conventional phase locked loop (hereinafter referred to as PLL) comprises a phase comparator, a low-pass filter, and a voltage-controlled oscillator (hereinafter referred to as a VCO). In the operation of this circuit, an input signal f.sub.i of a phase angle of .theta..sub.i is applied to the phase comparator. There it is phase compared with an output from the VCO, to produce an error voltage in accordance with the resulting phase difference. The high-frequency component of this error voltage is removed by the low-pass filter. The remaining signal is supplied to the VCO where it controls the oscillation frequency thereof. The resulting output of the VCO is supplied, on the hand, as a PLL output signal f.sub.o of a phase angle .theta..sub.o to the succeeding stage and, on the other hand, is fed back to the above mentioned phase comparator.
Here, the lock range .omega..sub.L of the PLL can be expressed as follows in terms of K.sub.d, the conversion gain of the phase comparator and F.sub.(s), the transfer function of the low-pass filter. The conversion gain of the VCO is expressed by K.sub.o /s. and the DC gain of the low-pass filter is made equal to unity (1). EQU .omega..sub.L = K.sub.d.sup. . K.sub.o.sup. . (.theta..sub.i - .theta..sub.o)
Therefore, when the natural angular frequency .omega..sub.n and the damping factor .zeta. of the PLL are constant, the lock range is influenced by the output of the phase comparator.
Heretofore, however, the operational range of the phase detection of the phase comparator of the PLL was from -.pi./2 rad. to +.pi./2 rad. in a phase comparator using a multiplier. It was from -.pi. rad. to +.pi. rad. or from -2.pi. rad. to +2.pi. rad. in a digital phase comparator, as is known. The range of the phase detecting operation range has been relatively narrow in either of these phase comparators.
Consequently, a conventional PLL has a narrow lock range. For this reason, it is easily affected by external disturbing noises imparted to the circuit. Unlocking readily occurs, with respect to frequency fluctuation, due to temperature variation and to variations of the VCO with elapse of time.